{chunghaw@cs.nthu.edu.tw}
¡P
Ph.D. 1992: in Information
and Computer Science at the University of California, Irvine.
Thesis title: Integration of Behavioral
and Layout Synthesis: A Chip Synthesis Approach.
¡P
M.S. 1985: in Electrical
and Computer Engineering at the University of Arizona, Tucson.
Thesis title: Determination of Bladder
Volumes by a Microprocessor-Based Ultrasonic System.
¡P
B.S. 1983: in Electronics
Engineering at the National Taiwan Institute of Technology, Taipei, Taiwan.
¡P
Professor
(8/1998-present): Department of Computer Science, Tsing Hua University, Hsinchu,
Taiwan.
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Lecturer (Spring
2000), Department of Information and Computer Science, University of
California, Irvine.
¡P
Associate
Professor (8/1992-7/1998), Department of Computer Science, Tsing Hua
University, Hsinchu, Taiwan.
Responsible for managing the development of a number of Verilog-based synthesis tools and design methodologies for chip and FPGA designs.
¡P
Visiting
Associate Professor (summer of 1994, 1997, 1998), Department of Information
and Computer Science, University of California, Irvine.
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Lecturer (summer
1997), Department of Information and Computer Science, University of
California, Irvine.
¡P Graduate Research Assistant (4/1988-4/1992), Department of Information and Computer Science, University of California, Irvine.
¡P
Graduate Research
Assistant (8/1983-8/1985), Department of Electrical and Computer Engineering,
University of Arizona.
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Director of Technical
Marketing (6/1999-8/2000), Y Explorations Inc., Lake Forest California, USA.
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Technical
Consultant (6/1998-6/1999), Y Explorations Inc., Irvine, California, U.S.A.
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Technical
Consultant (8/1998-10/1999), Faraday Technology Corp., Hsinchu, Taiwan.
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Senior Staff
Engineer (9/1995-9/1996), Quickturn Design Systems Inc., Mountain View,
California, U.S.A.
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Technical
Consultant (1/1995-8/1995), The Industrial Technology Research Institute,
Hsinchu, Taiwan.
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Design Engineer
(11/1985-4/1988), Physiology Department, University Medical Center, University of
Arizona.
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Design Engineer
(7/1977-12/1980), Dahsen Electronic Co., Taipei, Taiwan.
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Guest Editor, IEEE
Transactions on Very Large Scale Integration, Special Section on System-Level
Synthesis and Design, 2000.
¡P
General Chair, 12th
International Symposium on System Synthesis, San Jose, California, U.S.A.,
1999.
¡P
Publication Chair, 6th
International Conference on Database Systems for Advanced Applications,
Hsinchu, Taiwan, R.O.C., 1999.
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Program Chair, 11th
International Symposium on System Synthesis, Hsinchu, Taiwan, R.O.C., 1998.
¡P
Tutorials Chair, 4th
Asia-Pacific Conference on Hardware Description Languages, Hsinchu, Taiwan,
R.O.C., 1997.
¡P
Registration
Co-Chair, 5th Asian Test Symposium, Hsinchu, Taiwan, R.O.C., 1997.
¡P
Local Arrangement
Chair, 11th International Conference on Data Engineering, Taipei,
Taiwan, R.O.C., 1995.
Program committee member:
¡P
Design, Automation and Test in Europe Conference and Exhibition 2001
(DATE)
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Design, Automation and Test in Europe Conference and Exhibition 1999
(DATE)
¡P
IEEE International Conference on Computer-Aided Design 1997 (ICCAD)
¡P
Asia and South Pacific Design Automation Conference 1995-2001 (ASP-DAC)
¡P
Asia-Pacific Conference on Hardware Description Languages 1997-1998
(APCHDL)
¡P
5th Asian Test Symposium, 1997 (ATS).
¡P
Reviewed papers for ACM/IEEE Design Automation Conference, IEEE
International Conference on Computer-Aided Design, IEEE Transactions on
Computer-Aided Design, IEEE Transactions on Very Large Scale Integration
Systems, ACM Transactions on Design Automation of Electronic Systems, IEEE
Design & Test of Computers, IEEE Transaction on Computers, and Journal of
Design Automation for Embedded Systems.
¡P
Member of the IEEE Computer Society, Circuit & System Society, and
ACM Special Interest Group on Design Automation.
¡P
ACM/IEEE Design Automation Conference June 1996, Rapid System Prototyping Tutorial, Las Vegas, U.S.A.
¡P
Asia and South Pacific Design Automation Conference, Jan. 1999, Performance-Driven Layout Methodology
Tutorial, Hong Kong.
¡P
School of System LSI Technology, April 2000, Synthesis Technologies for System LSI (SOC) and IP Reuse, Osaka,
Japan.
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The 11th VLSI/CAD Symposium, August 2000, , Synthesis Methodologies for IP Reuse and SOC
Design, Keen-Ding, Taiwan.