2013 Fall CS 210201 數位邏輯設計 (Logic design)
Instructor :
Class room : R105 Delta bldg.
Time : T3T4R3
Office : R618 Delta bldg.
Ext. : 42970
E-mail : wcyao@cs.nthu.edu.tw
Office Hours : Thu 1330 ~ 1530 & Any time
Website : http://nthucad.cs.nthu.edu.tw/~wcyao/->Courses->Logic design (數位邏輯設計) or iLMS
Teaching Assistants:
劉千瑋, E-mail: s101062568@m101.nthu.edu.tw Office: R232, Ext.: 33569
胡詠峻, E-mail: hsboy1010@yahoo.com.tw Office: R231, Ext.: 33569
紀韋安, E-mail: lvpcxxq_q@yahoo.com.tw Office: R231, Ext.: 33569
翁婉禎, E-mail: ilven2218@gmail.com Office: R232, Ext.: 33569
周育民, E-mail: gogomyjet@yahoo.com.tw Office: R231, Ext.: 33569
郭家堯, E-mail: b8246555@yahoo.com.tw Office: R231, Ext.: 33569
何清萱, E-mail: hchings@gmail.com Office: R231, Ext.: 33569
林振宇, E-mail: pohy960@gmail.com Office: R231, Ext.: 33569
Text Books :
EFundamentals of Logic Design (7th Edition) by Charles H. Roth, Jr. and Larry L. Kinney (CENGAGE Learning, 滄海)
References :
Fundamentals of Digital Logic with Verilog Design by Stephen Brown and Zvonko Vranesic (McGraw-Hill)
Logic and Computer Design Fundamentals (3rd Edition) by M. M Mano (Prentice Hall, 新月)
Contents :
1. Introduction/ Number systems and Conversion
2. Boolean Algebra
3. K-Maps
4. Quine – McClusky Method
5. Multi-Level Gate Circuits/ NAND and NOR Circuits
6. Combinational Circuit Design and Simulation using Gates
7. Multiplexers, Decoders and PLDs
8. Latches and Flip-Flops
9. Registers and Counters
10. Sequential Circuit Analysis
11. State Minimization and Assignment
12. Sequential Circuit Design
13. Verilog
Teaching Method :
Lecture with slides
Course recording (ShareCourse)
Evaluation :
1. Quiz (in class) 20%
2. Midterm I 10/22 20%
3. Midterm II 11/19 25%
4. Final 01/14 35%
5. Homework Bonus
Homework :
Unit 1: 1.1, 1.2, 1.7, 1.17, 1.19(a), 1.21, 1.26(a)(b), 1.30, 1.44
Unit 2: 2.5, 2.6, 2.13, 2.23, 2.25, 2.27, 2.30
Unit1 & Unit2 Solution: LD unit1 & unit2 answer
Unit 3: 3.8, 3.10(a)(c), 3.17(f)(g), 3.18(f)(g), 3.20, 3.25(f)(g), 3.31, 3.38
Unit 4: 4.3, 4.4, 4.6, 4.9, 4.25, 4.45
Unit3 & Unit4 Solution: LD unit3 & unit4 answer
Deadline: 10/17 (Thu)
Unit 5: 5, 7, 22, 28
Unit 6: 4, 7, 23
Unit 7: 4, 5, 8, 10, 40, 42, 47
Unit5, Unit6, Unit7 Solution: LD unit5, unit6, unit7 answer
Unit 8: 2, 3, 4, 6, 10
Unit8 Solution: LD unit8 answer
Deadline: 11/12 (Thu)
Unit 9: 1, 4, 8, 13, 14, 24, 32, 36, 44(a), 46
Unit9 Solution: LD unit9 answer
Unit 11: 2, 4, 6, 9, 12, 24, 26
Unit11 Solution: LD unit11 answer
Unit 12: 7, 8, 11, 13, 35, 36, 38
Unit12 Solution: LD unit12 answer
Unit 13: 3(a), 3(b), 7, 9, 15(a), 15(b), 15(c), 23
Unit13 Solution: LD unit13 answer
Unit 14: 4, 5, 6, 10, 26, 34, 41
Unit14 Solution: LD unit14 answer
Unit 15: 2, 3, 6, 9, 15, 17, 33
Unit15 Solution: LD unit15 answer