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Short Biography

 

Chih-Tsun Huang (S'98-M'01-SM'09) received the Ph.D. degree in electrical engineering from the National Tsing Hua University (NTHU), Hsinchu, Taiwan, R.O.C., in 2000. Since 2004, he has been with the Department of Computer Science, NTHU, where he is currently an Associate Professor. He was a visiting researcher with the ECE Department, University of California, Santa Barbara (UCSB) from 2011 to 2012. He also serves as the Deputy Director of the Design Technology Center (DTC), NTHU, from 2012. His research interests include design and test technologies for multi-core and many-core architectures, fast prototyping technologies, and robustness VLSI computing including cryptography designs, error-correcting codecs, and system-level debug and performance monitoring. Dr. Huang has coauthored over 70 technical publications in IEEE journals and conferences. He also holds 7 US patents and 6 Taiwan ROC patents.

Prof. Huang was a recipient of 2014 Outstanding Technology Transfer Award from Ministry of Science and Technology (MOST), Taiwan, ROC. He was also a recipient of Silver Prize of 2009 National Invention Award, Taiwan, ROC. In addition, he received of the Best Paper Award of the 2003 IEEE Asia and South Pacific Design Automation Conference (ASP-DAC) and the Special Feature Award of the 2003 ASP-DAC University LSI Design Contest. He was also a recipient of the 2008 IEEE Computer Society Certificate of Appreciation, TTTC (Test Technology Technical Council) Service Award. He is now a senior member of IEEE.

Research Areas

 
The research direction focuses on VLSI design and design technologies for robustness, including the following topics:
  • Design, Automation and Test of Many-Core Systems, Virtual Electronic System Platform;
  • Cryptographic and Error Correction Engines.

Professional Activities and Societies

 
Membership
  • Senior member of IEEE (2009–present)
  • Member of IEEE Computer Society (2001–present)
  • Member of IEEE Circuits and Systems Society (2006–present)
  • Member of IEEE Test Technology Technical Council (TTTC) (1995–present)
  • Member of VLSI Test Technology Forum (VTTF)
  • Member of Electronic Design Automation Forum (EDAF)
  • Life Member of Taiwan IC Design Society (TICD)
Conferences
  • Publicity Co-Chair and Program Committee member of the 9th Workshop on Test of Wireless Circuits and Systems (WTW) 2010, Santa Cruz.
  • Finance Chair of the 17th Workshop on Synthesis And System Integration of Mixed Information technologies 2010 (SASIMI 2010), Taiwan.
  • Program Chair of 16th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2009), Hsinchu, Taiwan, ROC, 2009.
  • Program Committee member of the 19th Asian Test Symposium (ATS 2010), Shanghai, China, 2010.
  • Program Committee member of the 18th Asian Test Symposium (ATS 2009), Taichung, Taiwan, 2009.
  • Finance Chair of VLSI Test Technology Workshop (VTTW) 2008, 2009, 2010.
  • Program Committee member of IEEE International Symposium on Defect Fault Tolerance in VLSI Systems (DFTS) 2005-present.
    (DFTS2005 in Monterey, DFTS2006 in Washington DC, DFTS2007 in Rome, Italy, DFTS2008 in Cambridge, DFTS2010 in Kyoto)
  • Finance Chair of International Conference on Field-Programmable Technology (FPT), Taipei, Taiwan, ROC, 2008.
  • Program Committee member of 16th Asian Test Symposium (ATS 2007), Bejing, China, 2007.
  • Program Track Chair of 15th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2007), Taipei, Taiwan, ROC, 2007.
  • Finance Chair of 13th and 14th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2005-2006), Taipei, Taiwan, ROC, 2005-2006.
  • Tutorial Lecturer of VLSI-DAT 2005, topic: Test Techniques for System-on-Chip Devices.
  • Secretariat of 13th Asian Test Symposium (ATS 2004), Kengting, Taiwan, ROC, 2004.
  • Session Chair of VLSI-DAT 2009 (Tutorial Chair) in Hsinchu, ASPDAC 2007 in Yokohama, VTS 2006 in Berkeley California, VLSI-DAT 2007 in Hsinchu, ATS 2004 in Kenting.
Paper Reviewer
  • Journals
    • IEEE Transactions on Computers
    • IEEE Transactions on Very Large Scale Integration Systems
    • IEEE Transactions on Circuits and Systems I
    • IEEE Transactions on Circuits and Systems II
    • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
    • IEE Proceedings of Computers and Digital Techniques
    • Journal of Electronic Testing: Theory and Applications (JETTA)
    • IEICE (the Institute of Electronics, Information and Communication Engineers) Transactions
    • Institution of Engineering and Technology (IET) Circuits, Devices & Systesms
    • IET Computers & Digital Techniques
    • Asian Journal of Control (AJC)
    • Journal of Information Science and Engineering (JISE)
    • International Journal of Electrical Engineering (IJEE)
  • Conferences
    • ACM/IEEE Design Automation Conference (DAC)
    • IEEE International Test Conference (ITC)
    • IEEE VLSI Test Symposium (VTS)
    • Asia and South Pacific Design Automation Conference (ASPDAC)
    • IEEE Asian Solid-State Circuit Conference (ASSCC)
    • International Conference on Hardware-Software Codesign and System Synthesis (CODES+ISSS)
    • International Symposium on VLSI Design, Automation and Test (VLSI-DAT)
    • IEEE international Symposium on Circuits and Systems (ISCAS)
    • IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS)
    • IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFTS)
    • Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI)
    • IEEE International Workshop on Memory Technology, Design, and Testing (MTDT)
    • IEEE Internal Symposium on Embedded Computing (SEC)
    • Asian Test Symposium (ATS)
    • VLSI/CAD Symposium
    • VLSI Test Technology Workshop (VTTW)

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